High performance inductors are playing an increasing role in modern communication systems. Despite the superior performance offered by discrete components, parasitic capacitances from bond pads, board traces and packaging leads reduce the high frequency performance and contribute to the urgency of an integrated solution. Embedded inductors have the potential for significant increase in reliability and performance of the IC. Due to the driving force of CMOS integration and low costs of silicon-based IC fabrication, these inductors lie on a low resistivity silicon substrate, which is a major source of energy loss and limits the frequency response. Therefore, the quality factor of inductors fabricated on silicon continues to be low. The research presented in this thesis investigates amorphous Si and porous Si to improve the resistivity of Si substrates and explores amorphous Si as a structural material for low temperature MEMS fabrication.
Planar inductors are built-on undoped amorphous Si in a novel application and a 56% increase in quality factor was measured. Planar inductors are also built-on a porous Si and amorphous Si bilayer and showed 47% improvement.
Amorphous Si is also proposed as a low temperature alternative to polysilicon for MEMS devices. Tunable RF MEMS inductors and transformers are fabricated based on an amorphous Si and aluminum bimorph coil that is suspended and warps in a controllable manner. The 3-D displacement is accurately predicted by thermomechanical simulations. The tuning of the devices is achieved by applying a DC voltage and due to joule heating the air gap can be adjusted. A tunable inductor with a 32% tuning range from 5.6 to 8.2 nH and a peak Q of 15 was measured. A transformer with a suspended coil demonstrated a 24% tuning range of the mutual coupling between two stacked windings.
The main limitation posed by post-CMOS integration is a strict thermal budget which cannot exceed a critical temperature where impurities can diffuse and materials properties can change. The research carried out in this work accommodates this temperature restriction by limiting the RF fabrication processes to 150°C to facilitate system integration on silicon.
| Identifer | oai:union.ndltd.org:WATERLOO/oai:uwspace.uwaterloo.ca:10012/2657 |
| Date | January 2006 |
| Creators | Chang, Stella |
| Source Sets | University of Waterloo Electronic Theses Repository |
| Language | English |
| Detected Language | English |
| Type | Thesis or Dissertation |
| Format | 18295446 bytes, application/pdf |
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