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CMOS RF low noise amplifier with high ESD immunity.

Tang Siu Kei. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2004. / Includes bibliographical references (leaves 107-111). / Abstracts in English and Chinese. / Acknowledgements --- p.ii / Abstract --- p.iii / List of Figures --- p.xi / List of Tables --- p.xvi / Chapter Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Overview of Electrostatic Discharge --- p.1 / Chapter 1.1.1 --- Classification of Electrostatic Discharge Models --- p.1 / Chapter 1.2 --- Electrostatic Discharge in CMOS RF Circuits --- p.4 / Chapter 1.3 --- Research Goal and Contribution --- p.6 / Chapter 1.4 --- Thesis Outline --- p.6 / Chapter Chapter 2 --- Performance Parameters of Amplifier --- p.8 / Chapter 2.1 --- Amplifier Gain --- p.8 / Chapter 2.2 --- Noise Factor --- p.9 / Chapter 2.3 --- Linearity --- p.11 / Chapter 2.3.1 --- 1-dB Compression Point --- p.13 / Chapter 2.3.2 --- Third-Order Intercept Point --- p.14 / Chapter 2.4 --- Return Loss --- p.16 / Chapter 2.5 --- Power Consumption --- p.18 / Chapter 2.6 --- HBM ESD Withstand Voltage --- p.19 / Chapter Chapter 3 --- ESD Protection Methodology for Low Noise Amplifier --- p.21 / Chapter 3.1 --- Dual-Diode Circuitry --- p.22 / Chapter 3.1.1 --- Working Principle --- p.22 / Chapter 3.1.2 --- Drawbacks --- p.24 / Chapter 3.2 --- Shunt-Inductor Method --- p.25 / Chapter 3.2.1 --- Working Principle --- p.25 / Chapter 3.2.2 --- Drawbacks --- p.27 / Chapter 3.3 --- Common-Gate Input Stage Method --- p.28 / Chapter 3.3.1 --- Built-in ESD Protecting Mechanism --- p.29 / Chapter 3.3.2 --- Competitiveness --- p.31 / Chapter Chapter 4 --- Design Theory of Low Noise Amplifier --- p.32 / Chapter 4.1 --- Small-Signal Modeling --- p.33 / Chapter 4.2 --- Method of Input Termination --- p.33 / Chapter 4.2.1 --- Resistive Termination --- p.34 / Chapter 4.2.2 --- Shunt-Series Feedback --- p.34 / Chapter 4.2.3 --- l/gm Termination --- p.35 / Chapter 4.2.4 --- Inductive Source Degeneration --- p.36 / Chapter 4.3 --- Method of Gain Enhancement --- p.38 / Chapter 4.3.1 --- Tuned Amplifier --- p.38 / Chapter 4.3.2 --- Multistage Amplifier --- p.40 / Chapter 4.4 --- Improvement of Reverse Isolation --- p.41 / Chapter 4.4.1 --- Common-Gate Amplifier --- p.41 / Chapter 4.4.2 --- Cascoded Amplifier --- p.42 / Chapter Chapter 5 --- Noise Analysis of Low Noise Amplifier --- p.44 / Chapter 5.1 --- Noise Sources of MOS Transistor --- p.44 / Chapter 5.2 --- Noise Calculation using Noisy Two-Port Network --- p.46 / Chapter 5.3 --- Noise Calculation using Small-Signal Model --- p.49 / Chapter 5.3.1 --- Low Noise Amplifier with Inductive Source Degeneration --- p.49 / Chapter 5.3.2 --- Common-Gate Low Noise Amplifier --- p.52 / Chapter Chapter 6 --- Design of an ESD-protected CMOS Low Noise Amplifier --- p.54 / Chapter 6.1 --- Design of DC Biasing Circuitry --- p.55 / Chapter 6.2 --- Design of Two-Stage Architecture --- p.57 / Chapter 8.3.1 --- Design of Common-Gate Input Stage --- p.57 / Chapter 8.3.2 --- Design of Second-Stage Amplifier --- p.59 / Chapter 6.3 --- Stability Consideration --- p.61 / Chapter 6.4 --- Design of Matching Networks --- p.62 / Chapter 6.4.1 --- Design of Inter-Stage Matching Network --- p.64 / Chapter 6.4.2 --- Design of Input and Output Matching Networks --- p.67 / Chapter Chapter 7 --- Layout Considerations --- p.70 / Chapter 7.1 --- MOS Transistor --- p.70 / Chapter 7.2 --- Capacitor --- p.72 / Chapter 7.3 --- Spiral Inductor --- p.74 / Chapter 7.4 --- Layout of the Proposed Low Noise Amplifier --- p.76 / Chapter 7.5 --- Layout of the Common-Source Low Noise Amplifier --- p.79 / Chapter 7.6 --- Comparison between Schematic and Post-Layout Simulation Results --- p.81 / Chapter Chapter 8 --- Measurement Results --- p.82 / Chapter 8.1 --- Experimental Setup --- p.82 / Chapter 8.1.1 --- Testing Circuit Board --- p.83 / Chapter 8.1.2 --- Experimental Setup for s-parameter --- p.84 / Chapter 8.1.3 --- Experimental Setup for Noise Figure --- p.84 / Chapter 8.1.4 --- Experimental Setup for 1-dB Compression Point --- p.85 / Chapter 8.1.5 --- Experimental Setup for Third-Order Intercept Point --- p.86 / Chapter 8.1.6 --- Setup for HBM ESD Test --- p.87 / Chapter 8.2 --- Measurement Results of the Proposed Low Noise Amplifier --- p.89 / Chapter 8.2.1 --- S-parameter Measurement --- p.90 / Chapter 8.2.2 --- Noise Figure Measurement --- p.91 / Chapter 8.2.3 --- Measurement of 1-dB Compression Point --- p.92 / Chapter 8.2.4 --- Measurement of Third-Order Intercept Point --- p.93 / Chapter 8.2.5 --- HBM ESD Test --- p.94 / Chapter 8.2.6 --- Summary of Measurement Results --- p.95 / Chapter 8.3 --- Measurement Results of the Common-Source Low Noise Amplifier --- p.96 / Chapter 8.3.1 --- s-parameter Measurement --- p.97 / Chapter 8.3.2 --- Noise Figure Measurement --- p.98 / Chapter 8.3.3 --- Measurement of 1-dB Compression Point --- p.99 / Chapter 8.3.4 --- Measurement of Third-Order Intercept Point --- p.100 / Chapter 8.3.5 --- HBM ESD Test --- p.101 / Chapter 8.3.6 --- Summary of Measurement Results --- p.102 / Chapter 8.4 --- Performance Comparison between Different Low Noise Amplifier Designs --- p.103 / Chapter Chapter 9 --- Conclusion and Future Work --- p.105 / Chapter 9.1 --- Conclusion --- p.105 / Chapter 9.2 --- Future Work --- p.106 / References --- p.107 / Author's Publications --- p.112

Identiferoai:union.ndltd.org:cuhk.edu.hk/oai:cuhk-dr:cuhk_324883
Date January 2004
ContributorsTang, Siu Kei., Chinese University of Hong Kong Graduate School. Division of Electronic Engineering.
Source SetsThe Chinese University of Hong Kong
LanguageEnglish, Chinese
Detected LanguageEnglish
TypeText, bibliography
Formatprint, xvii, 112 leaves : ill. ; 30 cm.
RightsUse of this resource is governed by the terms and conditions of the Creative Commons “Attribution-NonCommercial-NoDerivatives 4.0 International” License (http://creativecommons.org/licenses/by-nc-nd/4.0/)

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