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PERFORMANCE EVALUATION OF A MULTI-CLOCK NoC ON FPGA

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Identiferoai:union.ndltd.org:OhioLink/oai:etd.ohiolink.edu:ucin1183666922
Date08 October 2007
CreatorsSWAMINATHAN, VIJAY
PublisherUniversity of Cincinnati / OhioLINK
Source SetsOhiolink ETDs
LanguageEnglish
Detected LanguagePortuguese
Typetext
Sourcehttp://rave.ohiolink.edu/etdc/view?acc_num=ucin1183666922
Rightsunrestricted, This thesis or dissertation is protected by copyright: all rights reserved. It may not be copied or redistributed beyond the terms of applicable copyright laws.

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