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Implementace jednotky pro vyhledávání vzorů v FPGA / Implementation of the Pattern Matching Unit in the FPGA

This term project focuses on algorithms for pattern matching used in modern IDS. The main focus is on regular expression matching. It deals with methods based on deterministic and nondeterministic finite automata, hybrid methods and with method based on regular expressions as programing langue for specialised processors. Implementation of pattern matching units based on some of described methodologies is described in next part. Methodology for resource consumption estimation is also described. Developed software system for unit generation is described in the next part. In the final part results are presented and discused.

Identiferoai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:237092
Date January 2010
CreatorsKošař, Vlastimil
ContributorsKořenek, Jan, Kaštil, Jan
PublisherVysoké učení technické v Brně. Fakulta informačních technologií
Source SetsCzech ETDs
LanguageCzech
Detected LanguageEnglish
Typeinfo:eu-repo/semantics/masterThesis
Rightsinfo:eu-repo/semantics/restrictedAccess

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