A microprocessor based bus protection scheme has been developed and relay hardware constructed for bus number two in the Oglethorpe substation within the transmission system of the Tennessee Valley Authority. The relay software is a hybrid combining the percentage differential principle with the phase comparison scheme. The phase comparison scheme incorporates a newly developed square wave generator unique to this thesis. The digital bus relay includes a new technique to detect current transformer saturation. This saturation detector is the Masters thesis work of Dr. Lifeng Yang, an alumnus of Virginia Tech.
A newly developed type of measuring device called a Magneto Optic Current Transducer (MOCT) has been installed on both ends of a transmission line in the Oglethorpe substation. Because the other five lines connected to the bus under investigation have conventional electro-mechanical CTs, the digital bus relay has to deal with dissimilar current sources.
Models of the substation were built using both the Electromagnetic Transients Program (EMTP) and the Transient Network Analyzer (TNA) in the Power Systems Laboratory at Virginia Tech. Data from these models was used to test the relay software and hardware.
Development of the digital bus relay software was done in FORTRAN. Because EMTP is a digital simulation, results from the EMTP models were easily converted for use by the FORTRAN code. The EMTP models include a saturable current transformer (CT) module. The EMTP CT module is a part of the Ph.D. work of Dr. Arvind Chaudhary, an alumnus of Virginia Tech. This off-line study encompassed a wide array of fault types and locations of which only a very few are presented in this thesis.
All hardware for this project was built in the Power Systems Laboratory at Virginia Tech. The hardware components include shunts, signal conditioners, the field computer with an analog to digital conversion board, IBM personal computers for communications, and relay output contacts. Software for communications and data interrogation has also been written.
Because the TNA model allows relay testing in real time, a time study of the digital bus relay software was conducted. After construction of the relay hardware and the software conversion from FORTRAN to assembly language for the Motorola 68020 32-bit microprocessor was complete, the relay was directly connected to the TNA. This study was instrumental in determining the sampling frequency of 720 Hertz for the relay. At this rate, the relay can correctly identify CT saturation in a quarter cycle and differentiate between a bus and an external fault in a half cycle. The bus protection scheme and hardware worked correctly in all of the fault cases studied. / Master of Science
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/46432 |
| Date | 30 December 2008 |
| Creators | Dolloff, Paul A. |
| Contributors | Electrical Engineering, Phadke, Arun G., De La Ree, Jaime, Broadwater, Robert P. |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Language | English |
| Detected Language | English |
| Type | Thesis, Text |
| Format | xii, 167 leaves, BTD, application/pdf, application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
| Relation | OCLC# 34391074, LD5655.V855_1995.D655.pdf |
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