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Implementace tvarování anténních příjmových svazků radaru v FPGA / Radar receiver beamforming implementation in FPGA

This thesis deals with design and implementation of digital beamformer for 3D radar. The text of this thesis contains derivation of beamforming algorithm and detailed description of it’s implementation on development kit with Cyclone V circuit. At the end of the thesis the beamformer design is verified and it’s further usage is discused.

Identiferoai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:403750
Date January 2019
CreatorsBárta, Jakub
ContributorsDvořák, Vojtěch, Bohrn, Marek
PublisherVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií
Source SetsCzech ETDs
LanguageCzech
Detected LanguageEnglish
Typeinfo:eu-repo/semantics/masterThesis
Rightsinfo:eu-repo/semantics/restrictedAccess

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