Hardware/software partitioning is a process that occurs frequently in embedded system design. It is the
procedure of determining whether a part of a system should be implemented in software or hardware.
This dissertation is a study of hardware/software partitioning and the use of scheduling algorithms to
improve the performance of dynamically reconfigurable computing devices. Reconfigurable computing
devices are devices that are adaptable at the logic level to solve specific problems [Tes05]. One example
of a reconfigurable computing device is the field programmable gate array (FPGA). The emergence of
dynamically reconfigurable FPGAs made it possible to configure FPGAs at runtime. Most current
approaches use a simple on demand configuration scheduling algorithm for the FPGA configurations. The
on demand configuration scheduling algorithm reconfigures the FPGA at runtime, whenever a
configuration is needed and is found not to be configured. The problem with this approach of dynamic
reconfiguration is the reconfiguration time overhead, which is the time it takes to reconfigure the FPGA
with a new configuration at runtime. Configuration caches and partial configuration have been proposed
as possible solutions to this problem, but these techniques suffer from various limitations.
The emergence of dynamically reconfigurable FPGAs also made it possible to perform dynamic
hardware/software partitioning (DHSP), which is the procedure of determining at runtime whether a
computation should be performed using its software or hardware implementation. The drawback of
performing DHSP using configurations that are generated at runtime is that the profiling and the dynamic
generation of configurations require profiling tool and synthesis tool access at runtime. This study
proposes that configuration scheduling algorithms, which perform DHSP using statically generated
configurations, can be developed to combine the advantages and reduce the major disadvantages of
current approaches. A case study is used to compare and evaluate the tradeoffs between the currently
existing approach for dynamic reconfiguration and the DHSP configuration scheduling algorithm based
approach proposed in the study. A simulation model is developed to examine the performance of the
various configuration scheduling algorithms. First, the difference in the execution time between the
different approaches is analyzed. Afterwards, other important design criteria such as power consumption,
energy consumption, area requirements and unit cost are analyzed and estimated. Also, business and
marketing considerations such as time to market and development cost are considered.
The study illustrates how different types of DHSP configuration scheduling algorithms can be
implemented and how their performance can be evaluated using a variety of software applications. It is
also shown how to evaluate when which of the approaches would be more advantageous by determining
the tradeoffs that exist between them. Also the underlying factors that affect when which design
alternative is more advantageous are determined and analyzed. The study shows that configuration
scheduling algorithms, which perform DHSP using statically generated configurations, can be developed
to combine the advantages and reduce some major disadvantages of current approaches. It is shown that
there are situations where DHSP configuration scheduling algorithms can be more advantageous than the
other approaches.
| Identifer | oai:union.ndltd.org:LACETR/oai:collectionscanada.gc.ca:OWTU.10012/3042 |
| Date | January 2007 |
| Creators | Kandasamy, Santheeban |
| Source Sets | Library and Archives Canada ETDs Repository / Centre d'archives des thèses électroniques de Bibliothèque et Archives Canada |
| Language | English |
| Detected Language | English |
| Type | Thesis or Dissertation |
| Format | 883484 bytes, application/pdf |
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