In this paper, we consider devices, circuits, and systems comprised of transistors with integrated ferroelectrics. Said structures are actively being considered by various semiconductor manufacturers as they can address a large and unique design space. Transistors with integrated ferroelectrics could (i) enable a better switch (i.e., offer steeper subthreshold swings), (ii) are CMOS compatible, (iii) have multiple operating modes (i.e., I-V characteristics can also enable compact, 1-transistor, non-volatile storage elements, as well as analog synaptic behavior), and (iv) have been experimentally demonstrated (i.e., with respect to all of the aforementioned operating modes). These device-level characteristics offer unique opportunities at the circuit, architectural, and system-level, and are considered here from device, circuit/architecture, and foundry-level perspectives.
| Identifer | oai:union.ndltd.org:DRESDEN/oai:qucosa:de:qucosa:76838 |
| Date | 30 November 2021 |
| Creators | Aziz, Ahmedullah, Breyer, Evelyn T., Chen, An, Chen, Xiaoming, Datta, Suman, Gupta, Sumeet Kumar, Hoffmann, Michael, Hu, Xiaobo Sharon, Ionescu, Adrian, Jerry, Matthew, Mikolajick, Thomas, Mulaosmanovic, Halid, Ni, Kai, Niemier, Michael, O'Connor, Ian, Saha, Atanu, Slesazeck, Stefan, Thirumala, Sandeep Krishna, Yin, Xunzhao |
| Publisher | IEEE |
| Source Sets | Hochschulschriftenserver (HSSS) der SLUB Dresden |
| Language | English |
| Detected Language | English |
| Type | info:eu-repo/semantics/acceptedVersion, doc-type:conferenceObject, info:eu-repo/semantics/conferenceObject, doc-type:Text |
| Rights | info:eu-repo/semantics/openAccess |
| Relation | 978-3-9819263-0-9, 10.23919/DATE.2018.8342213 |
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