The Versal Adaptive Compute Acceleration Platform (Versal ACAP) is a system-on-chip (SoC) developed by AMD Xilinx. To help protect the programmable logic from soft errors, the configuration needs to be constantly checked and repaired through a process called scrubbing. This thesis provides a methodology for scrubbing the configuration over JTAG. The scrubber uses two platform device image (PDI) files, one to read the configuration and one to send corrected frames. The methodology is characterized to determine the time it takes to completely scrub the configuration. The designed scrubber was able to scrub the VM1802 in 11.5 seconds, or 41.6 Mbits/second, when the JTAG interface was operated at 50MHz.
| Identifer | oai:union.ndltd.org:BGMYU2/oai:scholarsarchive.byu.edu:etd-11239 |
| Date | 06 December 2023 |
| Creators | Bjerregaard, Michael L. |
| Publisher | BYU ScholarsArchive |
| Source Sets | Brigham Young University |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | Theses and Dissertations |
| Rights | https://lib.byu.edu/about/copyright/ |
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