Present day data processing technology requires very high speed signal processing
and data conversion rates. Traditionally, these circuits have been implemented in silicon
MOS technology, whose high speed performance is limited, due to inherent material properties.
Though relatively immature compared to silicon technology, GaAs integrated circuit
technology appears to be a potential vehicle for realizing high-speed circuits because
of its high electron mobility and low parasitic capacitance. One major drawback of GaAs
technology has been the lack of complementary technology in contrast to silicon where
CMOS technology has greatly facilitated the development of analog ICs.
This thesis investigates the suitability of complementary GaAs Heterojunction FET
integrated circuit technology for the realization of high sample-rate switched-capacitor
circuits. In order to yield an accurate device model for the design work, model parameters
of both n and p GaAs Heterojunction FET devices are extracted from measurement results.
Based on the extraction results, a set of analog building blocks are presented. These
circuits include a high bandwidth operational amplifier and a fast settling switch which are
essential for high sample-rate circuits. A second order switched-capacitor low pass filter
sampling at a clock rate of 100MHz is designed using the above building blocks. The designs
studied predict better high frequency performance for C-HFETs compared to Si
CMOS technology. / Graduation date: 1994
| Identifer | oai:union.ndltd.org:ORGSU/oai:ir.library.oregonstate.edu:1957/37049 |
| Date | 19 July 1993 |
| Creators | Wang, Binan |
| Contributors | Goodnick, Stephen M., Kenney, John G. |
| Source Sets | Oregon State University |
| Language | en_US |
| Detected Language | English |
| Type | Thesis/Dissertation |
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