The device optimization is a very important element in semiconductor technology advancement. Its objective is to find a design point for a semiconductor device so that the optimized design goal meets all specified constraints. As in other engineering fields, a nonlinear optimizer is often used for design optimization. One major drawback of using a nonlinear optimizer is that it can only partially explore the design space and return a local optimal solution. This dissertation provides an adaptive optimization design methodology to allow the designer to explore the design space and obtain a globally optimal solution. One key element of our method is to quickly compute the set of all feasible solutions, also called the acceptability region. We described a polytope-based representation for the acceptability region and an adaptive linearization technique for device performance model approximation. These efficiency enhancements have enabled significant speed-up in estimating acceptability regions and allow acceptability regions to be estimated for a larger class of device design tasks. Our linearization technique also provides an efficient mechanism to guarantee the global accuracy of the computed acceptability region. To visualize the acceptability region, we study the orthogonal projection of high-dimensional convex polytopes and propose an output sensitive algorithm for projecting polytopes into two dimensions.
| Identifer | oai:union.ndltd.org:unt.edu/info:ark/67531/metadc500248 |
| Date | 05 1900 |
| Creators | Chang, Chih-Hui, 1967- |
| Contributors | Shi, Weiping, Jacob, Roy Thomas, Tate, Stephen B., Saxena, Sharad |
| Publisher | University of North Texas |
| Source Sets | University of North Texas |
| Language | English |
| Detected Language | English |
| Type | Thesis or Dissertation |
| Format | viii, 103 leaves : ill. (chiefly col.), Text |
| Rights | Public, Copyright, Copyright is held by the author, unless otherwise noted. All rights reserved., Chang, Chih-Hui, 1967- |
Page generated in 0.002 seconds