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Analysis and modeling of substrate noise coupling for NMOS transistors in heavily doped substrates

This thesis examines substrate noise coupling for NMOS transistors in
heavily doped substrates. The study begins with the analysis of an NMOS transistor
switching noise in a digital inverter at the device level. A resistive substrate
network for the NMOS transistor is proposed and verified. Coupling between N+-
P+ contacts is compared both qualitatively and quantitatively with simulations. The
difference between the N-P and P-P coupling is in the cross-coupling parameter. A
new N-P model, which requires only five parameters, is proposed by taking
advantage of an existing P-P model combined with the concept of a virtual
separation. This model has been validated up to 2GHz with Medici simulations.
The virtual separation concept has been validated with 2D/3D simulations and
measurements from test structures fabricated in a 0.35μm TSMC CMOS heavily
doped process. This model is useful when transistor switching noise is the
dominant source of substrate noise. Applications of the new N-P model are
demonstrated with circuit simulations. / Graduation date: 2004

Identiferoai:union.ndltd.org:ORGSU/oai:ir.library.oregonstate.edu:1957/30203
Date12 January 2004
CreatorsHsu, Shu-ching
ContributorsMayaram, Kartikeya, Fiez, Terri S.
Source SetsOregon State University
Languageen_US
Detected LanguageEnglish
TypeThesis/Dissertation

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