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A floating-point to fixed-point design flow for high performance digital signal processors /

Zugl.: Aachen, Techn. Hochsch., Diss., 2004.

Identiferoai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/76742968
Date January 2005
CreatorsCoors, Martin.
PublisherAachen : Shaker,
Source SetsOCLC
LanguageEnglish
Detected LanguageEnglish

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