¡@¡@The first topic of this thesis is a high-speed digital clock generator circuit is presented to provide negative delays in order to avoid a multi-locking hazard. The negative delay also results in small power consumption and shorter access time if the proposed circuit is used in the clock generator circuit of memory devices. Meanwhile, an accurately locked clock signal is also provided. The locked clock signal can be as high as 1.0 GHz at the presence of a random noise with 10% of power supply voltage when the design is implemented by TSMC (Taiwan Semiconductor Manufacturing Company) 0.35um CMOS 1P4M technol- ogy.
¡@¡@The second topic of this thesis is an 1-to-4 joystick enhanced interface which can be attached to SONY PS2 (playstation 2) is developed. The enhanced interface can allow 4 persons to play simultaneously through one port at the original game console. A total of 8 players can be supported when two of the interfaces hook up with both joystick ports of the console. The multiple player entertainment effect can be drastically enhanced by the usage of such an interface.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0614101-230632 |
| Date | 14 June 2001 |
| Creators | Kao, Rong-Sui |
| Contributors | Sying-Jyan Wang, I-J Huang, C-J Huang, Chua-Chin Wang |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0614101-230632 |
| Rights | not_available, Copyright information available at source archive |
Page generated in 0.0017 seconds