The increasing number of cores every generation poses challenges for high-performance in-memory database systems. While these systems use sophisticated high-level algorithms to partition a query or run multiple queries in parallel, they also utilize low-level synchronization mechanisms to synchronize access to internal database data structures. Developers often spend significant development and verification effort to improve concurrency in the presence of such synchronization. The Intel ® Transactional Synchronization Extensions (Intel ® TSX) in the 4th Generation Core™ Processors enable hardware to dynamically determine whether threads actually need to synchronize even in the presence of conservatively used synchronization. This paper evaluates the effectiveness of such hardware support in a commercial database. We focus on two index implementations: a B+Tree Index and the Delta Storage Index used in the SAP HANA ® database system. We demonstrate that such support can improve performance of database data structures such as index trees and presents a compelling opportunity for the development of simpler, scalable, and easy-to-verify algorithms.
| Identifer | oai:union.ndltd.org:DRESDEN/oai:qucosa:de:qucosa:81903 |
| Date | 12 January 2023 |
| Creators | Lehner, Wolfgang, Karnagel, Tomas, Dementiev, Roman, Rajwar, Ravi, Lai, Konrad, Legler, Thomas, Schlegel, Benjamin |
| Publisher | IEEE |
| Source Sets | Hochschulschriftenserver (HSSS) der SLUB Dresden |
| Language | English |
| Detected Language | English |
| Type | info:eu-repo/semantics/acceptedVersion, doc-type:conferenceObject, info:eu-repo/semantics/conferenceObject, doc-type:Text |
| Rights | info:eu-repo/semantics/openAccess |
| Relation | 978-1-4799-3097-5, 10.1109/HPCA.2014.6835957, info:eu-repo/grantAgreement/Deutsche Forschungsgemeinschaft/Exzellenzcluster/194636624//Center for Advancing Electronics Dresden/cfaed |
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