Thesis focuses on interpretation of nested petri nets described in PNML language on Atmel processors. It introduces this limited - from memory capacity and perfomance point of views - targeted architecture, since it greatly affected both design and implementation. The interpreter is thouroughly described from all aspects of its design. One of most important concerns in the whole process was the ability to test and verify achieved state of functionality quickly and possibly without Atmel processor. That’s why the implentation took place on a squeak platform, that allowed to translate whole interpreter for targeted platform. Motivation behind this and overall process of translation is also a subject of this work.
| Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:236381 |
| Date | January 2013 |
| Creators | Minář, Michal |
| Contributors | Kočí, Radek, Janoušek, Vladimír |
| Publisher | Vysoké učení technické v Brně. Fakulta informačních technologií |
| Source Sets | Czech ETDs |
| Language | Czech |
| Detected Language | English |
| Type | info:eu-repo/semantics/masterThesis |
| Rights | info:eu-repo/semantics/restrictedAccess |
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