The work deals with design and realisation of the five-levels high-speed quantizer using switched-current technique (SI). The main aim is to use an advantage of switched-current technique like potential of the high-speed operation and to minimize disadvantages at all. Flash structure of the quantizer is used to ensure high-speed operation. It is supposed that the quantizer will be part of greater integrated systems such as higher-order delta-sigma modulators. Simulations are performed in CADENCE simulation tool using AMIS CMOS 0,7 µm technologic process.
| Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:218776 |
| Date | January 2010 |
| Creators | Zeman, Pavel |
| Contributors | Háze, Jiří, Pavlík, Michal |
| Publisher | Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií |
| Source Sets | Czech ETDs |
| Language | Czech |
| Detected Language | English |
| Type | info:eu-repo/semantics/masterThesis |
| Rights | info:eu-repo/semantics/restrictedAccess |
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