In this dissertation, two important current mode circuit design subjects have
been explored. In the first part, the switched-current circuit technique has been
investigated. The fundamental performance and limitations of this technique are
explored. One of the major limitations, the signal distortion caused by clock
feedthrough has been substantially reduced by a newly developed clock
feedthrough cancellation technique. In addition, a filter synthesis technique has
been developed by directly simulating the structure of digital filter. Several
experimental CMOS prototypes have been designed and fabricated. The measured
frequency and phase responses demonstrated the feasibility of this synthesis
technique. In the second part, a new logic family called current-steering logic has
been developed. The fundamental performance and characteristics of this technique
have been discussed including the basic inverter and NOR gate with DC analysis,
transient analysis and power-delay product. It has been shown that the current-steering
logic has, a much smaller current spike than conventional CMOS logic
circuits, which is especially desirable in mixed-mode applications. Several
experimental prototypes have verified the functionality and performance of this new
technique. / Graduation date: 1991
| Identifer | oai:union.ndltd.org:ORGSU/oai:ir.library.oregonstate.edu:1957/37923 |
| Date | 19 December 1990 |
| Creators | Liang, Guojin |
| Contributors | Allstot, David J. |
| Source Sets | Oregon State University |
| Language | en_US |
| Detected Language | English |
| Type | Thesis/Dissertation |
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