The objective of this diploma thesis is design and realization of I2C bus analyzer. I2C bus protocol is briefly described, together with means of connecting devices to the bus. Next the basic requirements for I2C bus analyzer are defined. Then the design of hardware I2C-to-USB converter including block description is proposed. The chapter dedicated to converter firmware describes method of communication with PC, decoding of intercepted commands and principles of master, slave and passive mode of bus monitoring. The last part is focused on operation software and its structure. Described are individual interfaces, most notable classes and default plugin modules.
| Identifer | oai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:218855 |
| Date | January 2011 |
| Creators | Juhás, Miloš |
| Contributors | Šebesta, Jiří, Urbanec, Tomáš |
| Publisher | Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií |
| Source Sets | Czech ETDs |
| Language | Slovak |
| Detected Language | English |
| Type | info:eu-repo/semantics/masterThesis |
| Rights | info:eu-repo/semantics/restrictedAccess |
Page generated in 0.0019 seconds