The growing acceptance of B-ISDN (Broadband Integrated Services Digital Network) requires entirely new switching support a wide range of service demands including voice, video and data. At the same time, advances in the field of VLSI have enabled new principles to the design and architecture high-performance switching fabrics. Direct binary switch fabrics are a suitable candidate for future B- switches. Binary hypercubes have regular topology, are highly fault and have multiple paths for routing cells which help avoid performance penalties due to congestion and faults. In addition, these switches can adopt the novel, distributed, and adaptive routing scheme called 'deflection routing'. In normal routing, cells are routed along shortest paths to their destinations; in case of multiple cells contending for a single outgoing channel, the rest of the contending cells are either buffered or dropped to avoid congestion. In the case of deflection routing, cells can be routed along non-shortest paths. As a result, deflection routing helps avoid dropping cells. The scheme may be implemented with and without queuing buffers at the routers. In order to properly provision, control, and design these hypercube switches, it is essential that their performance capabilities be completely understood. Researchers have used both analytical model and simulations to evaluate performance of hypercube switches. The presence of distributed logic, multi-path routing, deflection routing, and queuing buffers make modeling tasks highly challenging. Building a reasonably accurate model of a hypercube switch with queuing buffers and deflection routing and using that model to gain practical insights into some of the important design parameters of the switch has been the major motivation of this thesis. An approximate Markov model of a single switching element is built to capture the behavior of a d-dimension switch. The numerical model is solved iteratively. Accuracy of the model is established by validating against simulation results. One disadvantage of having multiple paths, queuing buffers, and deflection motion of cells in hypercube switches is that the cells belonging to a particular traffic stream may not be delivered at their destinations in sequence. This phenomenon is known as 'out-of-orderness' of cells. An additional goal of this thesis has been development of a model to capture out-of-orderness phenomenon. The model is validated by comparing model results against simulation. Results show that the model is accurate and reveals significant insight into switch's behavior that can be used to design and engineer d-dimension hypercube switches.
| Identifer | oai:union.ndltd.org:USASK/oai:usask.ca:etd-10212004-001005 |
| Date | 01 January 1998 |
| Creators | Mukhopadhyaya, Utpal Kanti |
| Contributors | McCrosky, Carl |
| Publisher | University of Saskatchewan |
| Source Sets | University of Saskatchewan Library |
| Language | English |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://library.usask.ca/theses/available/etd-10212004-001005 |
| Rights | unrestricted, I hereby certify that, if appropriate, I have obtained and attached hereto a written permission statement from the owner(s) of each third party copyrighted matter to be included in my thesis, dissertation, or project report, allowing distribution as specified below. I certify that the version I submitted is the same as that approved by my advisory committee. I hereby grant to University of Saskatchewan or its agents the non-exclusive license to archive and make accessible, under the conditions specified below, my thesis, dissertation, or project report in whole or in part in all forms of media, now or hereafter known. I retain all other ownership rights to the copyright of the thesis, dissertation or project report. I also retain the right to use in future works (such as articles or books) all or part of this thesis, dissertation, or project report. |
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