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Automatic techniques for modeling impact of sub-wavelength lithography on transistors and interconnects and strategies for testing lithography induced defects

Thesis (M.S.E.C.E.)--University of Massachusetts Amherst, 2008. / Includes bibliographical references (p. 68-72).

Identiferoai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/232624910
Date January 2008
CreatorsSreedhar, Aswin,
Source SetsOCLC
LanguageEnglish
Detected LanguageEnglish
SourceConnect to this title online

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