The uplink load for the scheduling of Enhanced-Uplink (E-UL) channels determine the achievable data rate for Wideband Code Division Multiple Access (WCDMA) systems, therefore its accurate measurement carries a prime significance. The uplink load also known as Rise-over-Thermal (RoT), which is the quotient of the Received Total Wideband Power (RTWP) and the Thermal Noise Power floor. It is a major parameter which is calculated at each Transmission Time Interval (TTI) for maintaining cell coverage and stability. The RoT algorithm for evaluation of uplink load is considered as a complex and resource demanding among several Radio Resource Management (RRM) algorithms running in a radio system. The main focus of this thesis is to study RoT algorithm presently deployed in radio units and its possible optimization by reducing complexity of the algorithm in terms of memory usage and processing power. The calculation of RoT comprises three main blocks a Kalman filter, a noise floor estimator and the RoT computation. After analyzing the complexity of each block it has been established that the noise floor estimator block is consuming most of the processing power producing peak processor load since it involves many complex floating point calculations. However, the other blocks do not affect the processing load significantly. It was also observed that some block updates can be reduced in order to decrease the average load on the processor. Three techniques are proposed for reducing the complexity of the RoT algorithm, two for the reduction of peak load and one for the reduction of average load. For reducing the peak load, an interpolation approach is used instead of performing transcendental mathematical calculations. Also, the calculations involving noise floor estimation are extended over several TTIs by keeping in view that the estimation is not time critical. For the reduction of average load, the update rate for the Kalman Filter block is reduced. Based on these optimization steps, a modified algorithm for RoT computation with reduced complexity is proposed. The proposed changes are tested by means of MATLAB simulations demonstrating the improved performance with consistency in the output results. Finally, an arithmetic operation count is done using the hardware manual of Power PC (PPC405) used in Platform 4, which gives a rough estimate of decrease in the percentage of calculations after optimization. / saabairshad@gmail.com
Identifer | oai:union.ndltd.org:UPSALLA1/oai:DiVA.org:bth-4023 |
Date | January 2013 |
Creators | Irshad, Saba, Nepal, Purna Chandra |
Publisher | Blekinge Tekniska Högskola, Sektionen för ingenjörsvetenskap, Blekinge Tekniska Högskola, Sektionen för ingenjörsvetenskap |
Source Sets | DiVA Archive at Upsalla University |
Language | English |
Detected Language | English |
Type | Student thesis, info:eu-repo/semantics/bachelorThesis, text |
Format | application/pdf |
Rights | info:eu-repo/semantics/openAccess |
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