Two-dimensional numerical simulation was used to study the scaling properties of SOI p-MOSFETs. Based on the design criteria for the threshold voltage and DIBL, a set of design curves for different designs was developed. Data for subthreshold slope, SCE and threshold voltage sensitivity to silicon film thickness are also given. Results show that short-channel effects can be controlled by increasing the doping level or by thinning the silicon film thickness. The first approach is more effective for p+ gate design with high body doping, while the second approach is much more effective for n+ gate design with low body doping. Then+ gate design is more suited for the design of fully depleted (FD) devices since we need to keep the doping low to minimize the threshold adjustment implant dose and to use thin silicon films to control the SCE. The design of both p-MOSFET and Si 1-xGex p-MOSFET requires the implantation for the threshold voltage adjustment. The p+ gate design is more suited for the partially depleted (PD) or near-fully depleted device design since we need to use high doping for the threshold voltage adjustment and this results in large threshold voltage sensitivity to silicon film thickness for FD devices. The design of Si SOI p-MOSFET is done by properly adjusting the body doping. For the Si1-xGex SOI p-MOSFET large reduction in VTH requires large body doping. This increases the parasitic capacitances and slows down the device.
Identifer | oai:union.ndltd.org:pdx.edu/oai:pdxscholar.library.pdx.edu:open_access_etds-6006 |
Date | 11 August 1995 |
Creators | PersĖun, Marijan |
Publisher | PDXScholar |
Source Sets | Portland State University |
Detected Language | English |
Type | text |
Format | application/pdf |
Source | Dissertations and Theses |
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