NDLTD Global ETD Search
New Search
Return to search
Application of parallel processing techniques to routing for VLSI design
No description available.
Links & Downloads
http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.236449
Tags
620.0042029
VLSI design process
Additional Fields
Identifer
oai:union.ndltd.org:bl.uk/oai:ethos.bl.uk:236449
Date
January 1990
Creators
Sagar, V. K.
Publisher
University of Essex
Source Sets
Ethos UK
Detected Language
English
Type
Electronic Thesis or Dissertation
Page generated in 0.0018 seconds