Micro-Electro-Mechanical Systems (MEMS) varactors have the potential to
replace conventional varactor diodes, due to their high loss and non-linearity,
in many applications such as phase shifters, oscillators, and tunable filters.
The objective of this thesis is to develop novel MEMS varactors to improve
the capacitance tuning ratio, linearity, and quality factor. Several novel
varactor configurations are developed, analyzed, fabricated and tested. They
are built by using standard MEMS fabrication processes, as well as monolithic
integration techniques in CMOS technology.
The first capacitor consists of two movable plates, loaded with a nitride
layer that exhibits an analog continuous capacitance tuning ratio. To decrease
the the parasitic capacitance, a trench in the silicon substrate under the capacitor
is adopted. The use of an insulation dielectric layer on the bottom plate of
the MEMS capacitor increases the capacitors’ tuning ratio. Experimental and
theoretical results are presented for two versions of the proposed capacitor with
different capacitance values. The measured capacitance tuning ratio is 280%
at 1 GHz. The proposed MEMS vararctor is built using the MetalMUMPs process.
The second, third, and fourth capacitors have additional beams that are
called carrier beams. The use of the carrier beams makes it possible to obtain
an equivalent nonlinear spring constant, which increases the capacitors’ analog
continuous tuning ratio. A lumped element model and a continuous model of
the proposed variable capacitors are developed. The continuous model is simulated
by commercial software. A detailed analysis for the steady state of the
capacitors is presented. The measured capacitance tuning ratios of these three capacitors are 410%, 400% and 470%, respectively at 1 GHz. Also, the selfresonance
frequency is measured and found to exceed 11 GHz. The proposed
MEMS variable capacitors are built by the PolyMUMPs process.
The fifth novel parallel-plate MEMS varactor has thin-film vertical comb
actuators as its driver. Such an actuator can vertically displace both plates of
the parallel-plate capacitor. By making use of the fringing field, this actuator
exhibits linear displacement behavior, caused by the induced electrostatic
force of the actuator’s electrodes. The proposed capacitor has a low parasitic
capacitance and linear deflection due to the mechanically connected and
electrically isolated actuators to the capacitor’s parallel-plates. The measured
tuning capacitance ratio is 7:1 (600%) at 1 GHz. The fabricated MEMS varactor
exhibits a self resonance frequency of 9 GHz and built by MetalMUMPs
process.
The sixth parallel-plate MEMS varactor exhibits a linear response and
high tuning capacitance ratio. The capacitor employs the residual stress of
the chosen bi-layer, and the non-linear spring constants from the suspended
cantilevers to obtain a non-linear restoring force that compensates for the nonlinear
electrostatic force induced between the top and bottom plates. Two existing
techniques are used to widen the tuning range of the proposed capacitor.
The first technique is to decrease the parasitic capacitance by etching the lossy
substrate under the capacitor’s plates. The second technique is employed to
increase the capacitance density, where the areas between the top and bottom
plates overlap, by applying a thin film of dielectric material, deposited by the
atomic layer deposition (ALD) technique. The measured linear continuous
tuning ratio for the proposed capacitor, built in the PolyMUMPs process, is
5:1 (400%).
The seventh and eighth MEMS variable capacitors have plates that curl up.
These capacitors are built in 0.35 μm CMOS technology from the interconnect
metallization layers. The plates of the presented capacitors are intentionally curled upward to control the tuning performance.
A newly developed maskless post-processing technique that is appropriate
for MEMS/CMOS circuits is proposed. it consists of dry and wet etching steps,
developed to integrate the proposed MEMS varactors in CMOS technology.
Mechanically, the capacitors are simulated by the finite element method in
ANSYS, and the results are compared with the measured results. The seventh
capacitor is a tri-state structure that exhibits a measured tuning range of
460% at 1 GHz with a flat capacitance response that is superior to that of
conventional digital capacitors. The proposed capacitor is simulated in HFSS
and the extracted capacitance is compared with the measured capacitance
over a frequency range of 1 GHz to 5 GHz. The eighth capacitor is an analog
continuous structure that demonstrates a measured continuous tuning range of
115% at 1 GHz with no pull-in. The measured quality factor for both CMOSbased
capacitors is more than 300 at 1.5 GHz. The proposed curled-plate
capacitors have a small area and can be realized to build a System-on-Chip
(SoC). Finally, a tunable band pass filter that utilizes the MEMS variable
capacitors in 0.18 μm CMOS technology from TSMC is designed, modeled
and fabricated.
| Identifer | oai:union.ndltd.org:WATERLOO/oai:uwspace.uwaterloo.ca:10012/3456 |
| Date | January 2007 |
| Creators | Bakri-Kassem, Maher |
| Source Sets | University of Waterloo Electronic Theses Repository |
| Language | English |
| Detected Language | English |
| Type | Thesis or Dissertation |
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