Assertion-checker synthesis for hardware verification, in-circuit debugging and on-line monitoring

Description

Thesis (Ph.D.). / Written for the Dept. of Electrical and Computer Engineering. Title from title page of PDF (viewed 2008/05/09). Includes bibliographical references.

Links & Downloads

1. http://digitool.Library.McGill.CA:8881/R/?func=dbin-jump-full&object_id=18754

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Additional Fields

Identifer	oai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/316083147
Date	January 1900
Creators	Boulé, Marc.
Source Sets	OCLC
Language	English
Detected Language	English