Field Programmable Gate Arrays (FPGAs) offer a new opportunity for computer vision algorithms. By implementing in Very High Speed Integrated Circuit Hardware Description languate (VHDL), algorithms can be developed quickly, while being running much faster than by using conventional Von Neumann machines (such as a Personal Computer or Macintosh). The process of creating a working design from an algorithm is described in detail, and we present experimental results obtained from such a process for Sobel edge detection, as well as modifications for techniques for background modeling and fire detection.
| Identifer | oai:union.ndltd.org:ucf.edu/oai:stars.library.ucf.edu:honorstheses1990-2015-1283 |
| Date | 01 January 2001 |
| Creators | Phillips, Walter |
| Publisher | STARS |
| Source Sets | University of Central Florida |
| Language | English |
| Detected Language | English |
| Type | text |
| Source | HIM 1990-2015 |
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