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FPGA-based implementation of concatenative speech synthesis algorithm [electronic resource] / by Praveen Kumar Bamini.

Title from PDF of title page. / Document formatted into pages; contains 68 pages. / Thesis (M.S.Cp.E.)--University of South Florida, 2003. / Includes bibliographical references. / Text (Electronic thesis) in PDF format. / ABSTRACT: The main aim of a text-to-speech synthesis system is to convert ordinary text into an acoustic signal that is indistinguishable from human speech. This thesis presents an architecture to implement a concatenative speech synthesis algorithm targeted to FPGAs. Many current text-to-speech systems are based on the concatenation of acoustic units of recorded speech. Current concatenative speech synthesizers are capable of producing highly intelligible speech. However, the quality of speech often suffers from discontinuities between the acoustic units, due to contextual differences. This is the easiest method to produce synthetic speech. It concatenates prerecorded acoustic elements and forms a continuous speech element. The software implementation of the algorithm is performed in C whereas the hardware implementation is done in structural VHDL. A database of acoustic elements is formed first with recording sounds for different phones. / ABSTRACT: The architecture is designed to concatenate acoustic elements corresponding to the phones that form the target word. Target word corresponds to the word that has to be synthesized. This architecture doesn't address the form discontinuities between the acoustic elements as its ultimate goal is the synthesis of speech. The Hardware implementation is verified on a Virtex (v800hq240-4) FPGA device. / System requirements: World Wide Web browser and PDF reader. / Mode of access: World Wide Web.

Identiferoai:union.ndltd.org:USF/oai:palmm.fcla.edu:AJN3889SEB
Date January 2003
CreatorsBamini, Praveen Kumar.
PublisherUniversity of South Florida
Source SetsUniversity of South Flordia
Detected LanguageEnglish

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