The Internet and web service have become the most popularly platform and application of the Client-Server model due to the universality of the network recently years. Its growth is too fast to imagine the effect, many traditional service changes into web service stage by stage, and the load of the servers become more and more heavy. In the situation the server architecture must be adapted oppositely. The web cluster architecture has the best suit of the scalability, reliability and high performance requirement, was used extensively. We have designed and implemented a mechanism termed Content-aware Distributor, which is a software module for kernel-level extension, to effectively support content-based routing.
This paper is based on the achievement of the software-based Content-aware Distributor; we deliver some high repetition and fixity tasks to the hardware module, instead of the software module, to expect the hardware module could share the load of the software module and speedup the packet processing.
We design and implement the hardware-based packet forwarding mechanism, by the analyze result from the software module; partition three major functions into three Engines: The Analyze Engine, which is responsible to identify and analyze the header of the packet, and decide the packet needs to be send to the upper layer or forwarded; The Lookup Engine, which is responsible to lookup the address of the table which stores the data of packet modification; and the Update Engine, used to modify the packet header as soon as possible then transfer to the send queue. We use an algorithm termed Patch to fast calculate the checksums; it causes the packet length independence modification.
For the implementation, we use the Verilog HDL and EDA tools of Altera Corporation to accomplish the whole design. Simulation and evaluation the performance of processing the minimum packets, by operation at 50MHz system clock; our mechanism is faster double times than the packet receiving of two Fast Ethernet ports. From the resule we know our hardware mechanism is not only sharing the load of the upper layer, but also speedup the packet forwarding.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0729102-151308 |
| Date | 29 July 2002 |
| Creators | Lee, Chih-Feng |
| Contributors | Fu-Ren Lin, Ce-Kuen Shieh, Chu-Sing Yang, Chyi-Nan Chen, Tsung-Chuan Huang |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0729102-151308 |
| Rights | not_available, Copyright information available at source archive |
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