Testing is an integral part of modern semiconductor industry. The necessity of test is evident, especially for low-yielding processes, to ensure Quality of Service (QoS) to the customers. Testing is a major contributing factor to the total manufacturing cost of analog/RF systems, with test cost estimated to be up to 40% of the overall cost. Due to the lack of low-cost, high-speed testers and other test instrumentation that can be used in a production line, low-cost testing of high-frequency devices/systems is a tremendous challenge to semiconductor test community. Also, simulation times being very high for such systems, the only possible way to generate reliable tests for RF systems is by performing direct measurements on hardware. At the same time, inserting test points for such circuits while maintaining signal integrity is a difficult task to achieve.
The proposed research develops a test strategy to reduce overall test cost for RF circuits. A built-in-test (BIT) approach using sensors is proposed for this purpose, which are designed into high-frequency circuits. The work develops algorithms for selecting optimal test access points, and the stimulus for testing the DUT. The test stimulus can be generated on-chip, through efficient design reuse or using custom built circuits. The test responses are captured and analyzed by on-chip sensors, which are custom designed to extract test response features. The sensors, which have low silicon area overhead, output either DC or low frequency test response signals and are compatible to low-speed testers; hence are low-cost. The specifications of the system are computed using a set of nonlinear models developed using the alternate test methodology. The whole approach has been applied to a RF receiver at 1 GHz, used as a test vehicle to prove the feasibility of the proposed approach. Finally, the method is verified through measurements made on a large number of devices, similar to an industrial production test situation. The proposed method using sensors estimated system-level as well as device-level specifications very accurately in the emulated production test environment with a significantly smaller test cost than existing production tests.
| Identifer | oai:union.ndltd.org:GATECH/oai:smartech.gatech.edu:1853/7200 |
| Date | 19 July 2005 |
| Creators | Bhattacharya, Soumendu |
| Publisher | Georgia Institute of Technology |
| Source Sets | Georgia Tech Electronic Thesis and Dissertation Archive |
| Language | en_US |
| Detected Language | English |
| Type | Dissertation |
| Format | 3161082 bytes, application/pdf |
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