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Moderní metody verifikace smíšených integrovaných obvodů / Modern methods of mixed-signal integrated circuit verification

This work aims at methods, which are suitable for mixed-signal integrated circuit verification. The emphasis is on the Assertion-based verification. In practice there are two languages, which can be used for this method - PSL and SystemVerilog. These languages are compared between each other and individually tested to find their capabilities, functional limits and restrictions. One of them will be integrated into verification flow of SCG Czech Design Center s. r. o. company to develop ABV methodology in analog and mixed-signal domain.

Identiferoai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:401956
Date January 2019
CreatorsPodzemný, Jakub
ContributorsBohrn, Marek, Fujcik, Lukáš
PublisherVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií
Source SetsCzech ETDs
LanguageCzech
Detected LanguageEnglish
Typeinfo:eu-repo/semantics/masterThesis
Rightsinfo:eu-repo/semantics/restrictedAccess

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