SiLago: Enabling System Level Automation Methodology to Design Custom High-Performance Computing Platforms : Toward Next Generation Hardware Synthesis Methodologies

Description

<p>QC 20160428</p>

Links & Downloads

1. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-185787
2. urn:isbn:978-91-7595-900-9

Tags

System Level Synthesis

High Level Synthesis

VLSI Design Methodology

Brain-like Computation

Neuromorphic Hardware

Address Generation

Thread Level Parallelism

Additional Fields

Identifer	oai:union.ndltd.org:UPSALLA1/oai:DiVA.org:kth-185787
Date	January 2016
Creators	Farahini, Nasim
Publisher	KTH, Elektronik och Inbyggda System, Stockholm, Sweden
Source Sets	DiVA Archive at Upsalla University
Language	English
Detected Language	English
Type	Doctoral thesis, comprehensive summary, info:eu-repo/semantics/doctoralThesis, text
Format	application/pdf
Rights	info:eu-repo/semantics/openAccess
Relation	TRITA-ICT ; 2016:05