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The design and implementation of security and networking co-processors for high performance SoC applications

With the development of Internet, there are more and more applications around us are connected tightly with it. Security of network is important. This thesis will follow OSI 7-layers architecture, which defined by ISO, to propose several hardware improvement approaches of network security. In data-link layer, we improve performance of CRC calculation with parallel CRC calculation, such that a 32-bit data can be finished using CRC calculation in one cycle. In network layer and transport layer, bit-oriented instruction set has good performance for processing packet header. In application, we implement DES and AES algorithm in hardware. We integrate all hardware module with ARM7TDMI coprocessor¡¦s interface. Finally, we download integrated circuit into Xilinx XCV2000E chip to observe its demo to verify it.

Identiferoai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0123103-035712
Date23 January 2003
CreatorsChung, Kuo-huang
ContributorsMing-Haw Jing, Ing-Jer Huang, Kun-Sung Chen, Yun-Kang Lai
PublisherNSYSU
Source SetsNSYSU Electronic Thesis and Dissertation Archive
LanguageCholon
Detected LanguageEnglish
Typetext
Formatapplication/pdf
Sourcehttp://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0123103-035712
Rightsunrestricted, Copyright information available at source archive

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