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Low Cost Design of Advanced Encryption Standard (AES) Algorithm Using Efficient Common Sub-expression Elimination Methods

In this dissertation, we propose area-efficient Advanced Encryption Standard (AES) processor designs by applying four new common-subexpression-elimination (CSE) algorithms to the sub-functions that realize the various transformations in AES encryption and decryption. The first category of sub-functions is derived by combining adjacent transformations in each AES round into a new transformation. The other category of sub-functions is from the integrated transformations in the AES encryption and decryption process with shared common operations. Then the proposed bit-level CSE algorithm reduces further the area cost of realizing the sub-functions by extracting the common factors in the bit-level expressions of these sub-functions. The separate area-reduction effects of combinations, integrations and CSE optimization mentioned above are analyzed in order to examine the efficiency of each technique. Cell-based implementation results show that the area reduction rates of the AES processors with our proposed CSE methods achieve significant area improvement compared with Synopsys optimization results.

Identiferoai:union.ndltd.org:NSYSU/oai:NSYSU:etd-1005105-143759
Date05 October 2005
CreatorsChen, Ming-Chih
ContributorsBin-Da Liu, Ming-Hwa Sheu, Chua-Chin Wang, Jiun-In Guo, Shen-Fu Hsiao, Jau-Der Shih
PublisherNSYSU
Source SetsNSYSU Electronic Thesis and Dissertation Archive
LanguageEnglish
Detected LanguageEnglish
Typetext
Formatapplication/pdf
Sourcehttp://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-1005105-143759
Rightscampus_withheld, Copyright information available at source archive

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