Tiny, ultra-low-power embedded processors enable sophisticated computing deployments in a myriad of areas previously off limits to computing power, ranging from intelligent medical implants to massive scale 'smart dust'-type sensing deployments.
While today's computing and sensing hardware is well-suited for these next generation deployments, the batteries powering them are not: the size and weight of today's mobile and Internet-of-Things devices are dominated by their batteries, which also limit systems' lifespans and potential for deployment in sensitive contexts.
Academic efforts have demonstrated the feasibility of harvesting energy on-demand from the environment as a practical alternative to classical battery power, instead buffering harvested energy in a capacitor to power intermittent bursts of operation.
Energy harvesting circuits are miniaturizable, inexpensive, and enable effectively indefinite operation when compared to batteries---but introduce new problems stemming from the lack of a reliable power source.
Unfortunately, these problems have so far confined batteryless systems to small-scale research deployments.
The central design challenge for effective batteryless operation is efficiently using scarce input power from the energy harvesting frontend.
Despite advances in both harvester and processor efficiency, digital systems often consume orders of magnitude more power than can be supplied by harvesting circuits---forcing systems to operate in short bursts punctuated by power failure and a long recharge period.
Today's batteryless systems pay a steep price to sustain operation across these common-case power losses: current platforms depend on high-performance non-volatile memory to quickly and efficiently checkpoint program state before power loss, limiting batteryless operation to a small selection of devices which integrate these novel memory technologies.
Choosing exactly when to checkpoint to non-volatile memory represents a challenge in itself: the hardware required to detect impending power failure often represents a large proportion of the system's overall energy consumption, forcing designers to choose between the energy overhead of voltage monitoring or the runtime overhead of 'energy-oblivious' checkpointing models.
Finally, the choice of buffer capacitor size has a large impact on overall energy efficiency---but the optimal choice depends on runtime energy dynamics which are difficult to predict at design time, leaving designers to make at best educated guesses about future environmental conditions.
This work approaches energy harvesting system design from a circuits perspective, answering the following research questions towards practical and performant batteryless operation:
1. Can the emergent properties of today's low-power systems be used to enable efficient intermittent operation on new classes of devices?
2. What compromises can we make in voltage monitor design to minimize power consumption while maintaining just enough functionality for batteryless operation?
3. How can we buffer harvested energy in a way that maximizes energy efficiency despite unpredictable system-level power dynamics?
This work answers the following questions by producing the following research artifacts:
1. The first non-volatile memory invariant system to enable intermittent operation on embedded devices lacking high-performance memory (Chapter 2).
2. The first voltage monitoring circuit designed for batteryless systems to enable energy-aware operation without sacrificing efficiency (Chapter 3).
3. The first highly efficient power-adaptive energy buffer to store harvested energy without compromising on efficiency or performance (Chapter 4). / Doctor of Philosophy / Tiny, ultra-low-power embedded processors enable sophisticated computing deployments in a myriad of areas previously off limits to computing power, ranging from intelligent medical implants to massive scale 'smart dust'-type sensing deployments.
While today's computing and sensing hardware is well-suited for these next generation deployments, the batteries powering them are not: the size and weight of today's mobile and Internet-of-Things devices are dominated by their batteries, which also limit systems' lifespans and potential for deployment in sensitive contexts.
Academic efforts have demonstrated the feasibility of harvesting energy on-demand from the environment as a practical alternative to classical battery power, instead buffering harvested energy in a short-term energy store (i.e., a capacitor) to power intermittent bursts of operation.
Energy harvesting circuits are miniaturizable, inexpensive, and enable effectively indefinite operation when compared to batteries---but introduce new problems stemming from the lack of a reliable power source.
Unfortunately, these problems have so far confined batteryless systems to small-scale research deployments.
The central design challenge for effective batteryless operation is efficiently using scarce input power from the energy harvesting frontend.
Despite advances in both harvester and processor efficiency, digital systems often consume orders of magnitude more power than can be supplied by harvesting circuits---forcing systems to operate in short bursts punctuated by power failure and a long recharge period.
Today's batteryless systems pay a steep price to sustain operation across these common-case power losses: current platforms depend on high-performance non-volatile memory (which retains state without power) to quickly and efficiently checkpoint program state before power loss, limiting batteryless operation to a small selection of devices which integrate these novel memory technologies.
Choosing exactly when to checkpoint to non-volatile memory represents a challenge in itself: the hardware required to detect impending power failure often represents a large proportion of the system's overall energy consumption, forcing designers to choose between the energy overhead of voltage monitoring or the runtime overhead of 'energy-oblivious' checkpointing models.
Finally, the choice of energy buffer size has a large impact on overall energy efficiency---but the optimal choice depends on runtime energy dynamics which are difficult to predict at design time, leaving designers to make at best educated guesses about future environmental conditions.
This work approaches energy harvesting system design from a circuits perspective, answering the following research questions towards practical and performant batteryless operation:
1. Can the emergent properties of today's low-power systems be used to enable efficient intermittent operation on new classes of devices?
2. What compromises can we make in voltage monitor design to minimize power consumption while maintaining just enough functionality for batteryless operation?
3. How can we buffer harvested energy in a way that maximizes energy efficiency despite unpredictable system-level power dynamics?
This work answers the following questions by producing the following research artifacts:
1. The first non-volatile memory invariant system to enable intermittent operation on embedded devices lacking high-performance memory (Chapter 2).
2. The first energy monitoring circuit designed for batteryless systems to enable energy-aware operation without sacrificing efficiency (Chapter 3).
3. The first highly efficient power-adaptive energy buffer to store harvested energy without compromising on efficiency or performance (Chapter 4).
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/119247 |
| Date | 03 June 2024 |
| Creators | Williams, Harrison Ridgway |
| Contributors | Computer Science and#38; Applications, Hicks, Matthew, Jung, Changhee, Jian, Xun, Butt, Ali, Stavrou, Angelos |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Language | English |
| Detected Language | English |
| Type | Dissertation |
| Format | ETD, application/pdf, application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
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