Functional level modeling techniques for modeling digital devices that vary in complexity from SSI to LSI are described in this thesis. The vehicle used for modeling is GSP, a general simulation program developed under Dr. J. R. Armstrong at Virginia Tech. These techniques have been used extensively for modeling various devices which include counters, RAMs, ROMs, microprocessor peripheral chips and CPUs. Processors modeled include the Intel 8080, the Zilog Z80 (single chip CPUs) and the Bendix BDX930 (MSI). / Master of Science
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/87252 |
| Date | January 1982 |
| Creators | Puthenpurayil, Venugopal |
| Contributors | Electrical Engineering |
| Publisher | Virginia Polytechnic Institute and State University |
| Source Sets | Virginia Tech Theses and Dissertation |
| Language | en_US |
| Detected Language | English |
| Type | Thesis, Text |
| Format | vii, 145, [1] leaves, application/pdf, application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
| Relation | OCLC# 9274107 |
Page generated in 0.0021 seconds