Return to search

Návrh a realizace Sigma-Delta modulátoru v technice SC / Design of CMOS SC Sigma-Delta Modulator in i3t technology

Design step for Sigma-Delta ADC is introduced. Suitable solution for performance improvement of the original Sigma-Delta ADC, which meets new requirements on resolution of 16 bits and signal bandwidth 20-50 kHz is presented. Advantage of using multi-bit quantization and DEM DWA method reducing the linearity requirements of the internal feedback DAC is shown.

Identiferoai:union.ndltd.org:nusl.cz/oai:invenio.nusl.cz:217882
Date January 2009
CreatorsValehrach, Ondřej
ContributorsFujcik, Lukáš, Koudar, Ivan
PublisherVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií
Source SetsCzech ETDs
LanguageCzech
Detected LanguageEnglish
Typeinfo:eu-repo/semantics/masterThesis
Rightsinfo:eu-repo/semantics/restrictedAccess

Page generated in 0.0017 seconds