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Pipelined IEEE-754 Double Precision Floating Point Arithmetic Operators on Virtex FPGA’s

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Identiferoai:union.ndltd.org:OhioLink/oai:etd.ohiolink.edu:ucin1017085297
Date22 May 2002
CreatorsPathanjali, Nandini
PublisherUniversity of Cincinnati / OhioLINK
Source SetsOhiolink ETDs
LanguageEnglish
Detected LanguageEnglish
Typetext
Sourcehttp://rave.ohiolink.edu/etdc/view?acc_num=ucin1017085297
Rightsunrestricted, This thesis or dissertation is protected by copyright: all rights reserved. It may not be copied or redistributed beyond the terms of applicable copyright laws.

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