Thesis (PhD (Electric and Electronic Engineering))--University of Stellenbosch, 2007. / There is increasing use of commercial components in space technology and it is
important to recognize that the space radiation environment poses the risk of permanent
malfunction due to radiation. Therefore, the integrated circuits used for spacecraft
electronics must be resistant to radiation.
The effect of using the MOSFET device in a radiation environment is that the gate oxide
becomes ionized by the dose it absorbs due to the radiation induced trapped charges in
the gate-oxide. The trapped charges in the gate-oxide generate additional space charge
fields at the oxide-substrate interface. After a sufficient dose, a large positive charge
builds up, having the same effect as if a positive voltage was applied to the gate terminal.
Therefore, the transistor source to drain current can no longer be controlled by the gate
terminal and the device remains on permanently resulting in device failure.
There are four processes involved in the radiation response of MOS devices. First, the
ionizing radiation acts with the gate oxide layer to produce electron-hole pairs. Some
fraction of the electron-hole pairs recombine depending on the type of incident particle
and the applied gate to substrate voltage, i.e. the electric field. The mobility of the
electron is orders of magnitude larger than that of the holes in the gate oxide, and is swept
away very quickly in the direction of the gate terminal. The time for the electrons to be
swept away is on the order of 1ps. The holes that escape recombination remain near their
point of origin. The number of these surviving holes determines the initial response of the
device after a short pulse of radiation. The cause of the first process, i.e. the presence
of the electric field, is the main motivation for design method described in this
dissertation.
The second process is the slow transport of holes toward the oxide-silicon interface due
to the presence of the electric field. When the holes reach the interface, process 3, they
become captured in long term trapping sites and this is the main cause of the permanent threshold voltage shift in MOS devices. The fourth process is the buildup of interface
states in the substrate near the interface
The main contribution of this dissertation is the development of the novel Switched
Modular Redundancy (SMR) method for mitigating the effects of space radiation on
satellite electronics. The overall idea of the SMR method is as follows: A charged
particle is accelerated in the presence of an electric field. However, in a solid, electrons
will move around randomly in the absence of an applied electric field. Therefore if one
averages the movement over time there will be no overall motion of charge carriers in
any particular direction. On applying an electric field charge carriers will on average
move in a direction aligned with the electric field, with positive charge carriers such as
holes moving in the direction of field, and negative charge carriers moving in the
opposite direction. As is the case with process one and two above.
It is proposed in this dissertation that if we apply the flatband voltage (normaly a zero
bias for the ideal NMOS transistor) to the gate terminal of a MOS transistor in the
presence of ionizing radiation, i.e. no electric field across the gate oxide, both the free
electrons and holes will on average remain near their point of origin, and therefore have a
greater probability of recombination. Thus, the threshold voltage shift in MOS devices
will be less severe for the gate terminal in an unbiased condition. The flatband conditions
for the real MOS transistor is discussed in appendix E.
It was further proposed that by adding redundancy and applying a resting policy,
one can significantly prolong the useful life of MOS components in space. The fact
that the rate of the threshold voltage shift in MOS devices is dependant on the bias
voltage applied to the gate terminal is a very important phenomenon that can be
exploited, since we have direct control and access to the voltage applied to the gate
terminal. If for example, two identical gates were under the influence of radiation and
the gate voltage is alternated between the two, then the two gates should be able to
withstand more total dose radiation than using only one gate. This redundancy could be
used in a circuit to mitigate for total ionizing dose. The SMR methodology would be to duplicate each gate in a circuit, then selectively only
activating one gate at a time allowing the other to anneal during its off cycle. The SMR
algorithm was code in the “C” language. In the proposed design methodology, the design
engineer need not be concerned about radiation effects when describing the hardware
implementation in a hardware description language. Instead, the design engineer makes
use of conventional design techniques. When the design is complete, it is synthesized to
obtain the gate level netlist in edif format. The edif netlist is converted to structural
VHDL code during synthesis. The structural VHDL netlist is fed into the SMR “C”
algorithm to obtain the identical redundant circuit components. The resultant file is also a
structural VHDL netlist. The generated VHDL netlist or SMR circuit can then be mapped
to a Field Programmable Gate Array (FPGA).
Spacecraft electronic designers increasingly demand high performance microprocessors
and FPGAs, because of their high performance and flexibility. Because FPGAs are
reprogrammable, they offer the additional benefits of allowing on-orbit design changes.
Data can be sent after launch to correct errors or to improve system performance. System
including FPGAs covers a wide range of space applications, and consequently, they are
the object of this study in order to implement and test the SMR algorithm.
We apply the principles of reconfigurable computing to implement the Switched Modular
Redundancy Algorithm in order to mitigate for Total Ionizing Dose (TID) effects in
FPGA’s. It is shown by means of experimentation that this new design technique
provides greatly improved TID tolerance for FPGAs.
This study was necessary in order to make the cost of satellite manufacturing as low as
possible by making use of Commercial off-the-shelf (COTS) components. However,
these COTS components are very susceptible to the hazards of the space environment.
One could also make use of Radiation Hard components for the purpose of satellite
manufacturing, however, this will defeat the purpose of making the satellite
manufacturing cost as low as possible as the cost of the radiation hard electronic components are significantly higher than their commercial counterparts. Added to this is
the undesirable fact that the radiation hard components are a few generations behind as
far as speed and performance is concerned, thus providing even greater motivation for
making use of Commercial components.
Radiation hardened components are obtained by making use of special processing
methods in order to improve the components radiation tolerance. Modifying the process
steps is one of the three ways to improve the radiation tolerance of an integrated circuit.
The two other possibilities are to use special layout techniques or special circuit and
system architectures.
Another method, in which to make Complementary Metal Oxide Silicon (CMOS) circuits
tolerant to ionizing radiation is to distribute the workload among redundant modules
(called Switched Modular Redundancy above) in the circuit. This new method will be
described in detail in this thesis.
| Identifer | oai:union.ndltd.org:netd.ac.za/oai:union.ndltd.org:sun/oai:scholar.sun.ac.za:10019.1/1108 |
| Date | 12 1900 |
| Creators | Smith, Farouk |
| Contributors | Mostert, S., University of Stellenbosch. Faculty of Engineering. Dept. of Electrical and Electronic Engineering. |
| Publisher | Stellenbosch : University of Stellenbosch |
| Source Sets | South African National ETD Portal |
| Language | English |
| Detected Language | English |
| Type | Thesis |
| Format | 3734802 bytes, application/pdf |
| Rights | University of Stellenbosch |
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