It has been proofed that Reconfigurable Computing System possesses
the potential to promote system efficiency. Fine-Grain Reconfigurable
Computing System, which integrates the co-design of software and
hardware, is the prevailing current in system designing with low clock
rate and high efficiency. The thesis focuses on computing-oriented
Fine-Grain Reconfigurable Computing System of software-hardware
interwork, and setting up invoking working model for software
program and hardware module as well. The designing of software and
hardware can be integrated into one program, which deals with the
hardware as a function. By quick computing of hardware, it can
promote system efficiency. This interwork mechanism can be
combined into traditional instruction execute pipeline. It composes
manageable Fine-Grain for Reconfigurable Computing System as a
new processor architecture, which brings up new command to support
execution of software-hardware interwork mechanism. The model
architecture is verified by algorithms of multimedia application, such
as Motion Estimation and DCT. In addition, it presents the optimizing
model by analysis and comparison of software and hardware
efficiency.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0828107-122819 |
| Date | 28 August 2007 |
| Creators | He, Zong-cian |
| Contributors | Tsung Lee, Shen-Fu Hsiao, Jih-Ching Chiu, Chung-Ping Chung |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0828107-122819 |
| Rights | campus_withheld, Copyright information available at source archive |
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