A process has been developed to make the dielectric layer for organic thin-film transistors (OTFTs) in a roll-to-roll vacuum web coater environment. This dielectric layer combined with an organic semiconductor layer and metal layer deposited in vacuum allows a solvent-free process to make organic/inorganic multilayer structures for thin-film electronic devices on a flexible substrate at, potentially, high speed. The polymeric gate dielectric layers were fabricated by flash evaporation of acrylic monomers onto a polymer film with pre-patterned metal gates followed by radiation curing by electron beam, ultra-violent light (UV) or plasma. With a non-polar dielectric surface, charge carrier mobility (μ) of 1 cm<sup>2</sup>-V<sup>-1</sup>s<sup>-1</sup>; on/off curren ratio of 10<sup>8</sup>, sub-threshold swing (SS) of 0.3 V/decade and saturated output curve were routinely achieved in dinaphtho-[2,3-b:2'3'-f]thieno[3,2-b]thiophene (DNTT) transistors with dielectric layer of tripropylene glycol diacrylate (TPGDA) of ~400 nm. Apart from the TPGDA, monomer formulas including 1,6-Hexanediol diacrylate (HDDA) as well as several commercial acrylic resins have been used to make the dielectric layer. The highest areal capacitance of 41nF-cm<sup>-2</sup> was achieved with a pin-hole free film of less than 100 nm made of an acrylate mixture resin. A non-polar dielectric surface treatment layer has been developed based on flash evaporation of lauryl acrylate and HDDA mixture. The transistors with the buffer layer showed constant performance and a mobility fivefold greater than those of untreated samples. The effect of humidity, oxygen, and light during switching cycles of both pentacene and DNTT transistors were studied. Water and oxygen/illumination had a distinct effect on both pentacene and DNTT transistors. Oxygen leads to acceptor-like charge traps under illumination, which shifted the turn-on voltage (V<sub>to</sub>) to more positive values. In contrast, water in transistors gave rise to donor-like charge traps, which shifted the V<sub>to</sub> and the threshold voltage (V<sub>T</sub>) more negatively. The DNTT devices showed good stability in dry air without encapsulation, while pentacene transistors degraded with either repeating measurement or long term storage. A DNTT transistor with a PS-coated TPGDA dielectric layer showed stable drain current (I<sub>d</sub>) of ~105A under bias stress of the gate voltage (em>V<sub>g</sub>) of -20V and the drain voltage (em>V<sub>d</sub>) of -20V for at least 144 hours. The V<sub>to</sub> shift after the stress was less than 5 V and was recoverable when the device was kept in dry air for a few days. Possible reasons for the V<sub>to</sub> shift have been discussed.
| Identifer | oai:union.ndltd.org:bl.uk/oai:ethos.bl.uk:647589 |
| Date | January 2014 |
| Creators | Ding, Ziqian |
| Contributors | Assender, Hazel; Gamal, Abbas |
| Publisher | University of Oxford |
| Source Sets | Ethos UK |
| Detected Language | English |
| Type | Electronic Thesis or Dissertation |
| Source | http://ora.ox.ac.uk/objects/uuid:e7decca4-14e3-47e7-85ca-0bb14755f282 |
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