The electromigration (EM) and chip-package interaction (CPI) reliability of flip chip packages with Cu pillar structures was investigated. First the EM-related characteristics of Cu pillars with solder tips were studied and compared with standard controlled collapse chip connection (C4) Pb-free solder joints. The simulation results revealed a significant reduction in the current crowding effect when C4 solder joints was replaced by Cu pillar structures. As a result, the current-induced Joule heating and local temperature gradients were reduced in the Cu pillar structure. This was followed by a study of the impact of the Cu pillar bumps on the mechanical reliability of low-k dielectrics. The CPI-induced crack driving force for delamination in the low-k interconnect structure was evaluated using a 3D sub-modeling technique. The energy release rate was found to increase significantly for packages with Cu pillar bumps compared with those with C4 Pb-free solder joints only. Structural optimization of Cu pillar bumps to improve the mechanical stability of packages with low-k chips was discussed. / text
| Identifer | oai:union.ndltd.org:UTEXAS/oai:repositories.lib.utexas.edu:2152/ETD-UT-2011-12-4474 |
| Date | 13 February 2012 |
| Creators | Wang, Yiwei |
| Source Sets | University of Texas |
| Language | English |
| Detected Language | English |
| Type | thesis |
| Format | application/pdf |
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