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Dynamically reconfigurable dataflow architecture for high performance digital signal processing on multi FPGA platforms

Zugl.: Hamburg, Techn. Univ., Diss., 2008

  1. http://d-nb.info/992481694/04
Identiferoai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/310131125
Date January 2008
CreatorsVoigt, Sven-Ole
PublisherAachen Shaker
Source SetsOCLC
LanguageEnglish
Detected LanguageEnglish

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