In our daily life, we are increasingly putting our trust in embedded software applications, which run on a range of processor-based embedded systems from smartcards to pay-TV units. This trend expands the threat model of embedded applications from software into hardware. Over the last 20 years, fault attacks have emerged as an important class of hardware attacks against embedded software security. In fault attacks, an adversary breaks the security by injecting well chosen, targeted faults during the execution of embedded software, and systematically analyzing softwares fault response.
In this work, we propose cycle-accurate and fully digital techniques that can efficiently detect different types of fault attacks. The detection methods are low-cost regarding the area and power consumption and can be easily implemented using the standard cell based VLSI design flow. In addition to the architecture of the detectors, we present a detailed analysis of the design considerations that affect the cost and accuracy of the detectors. The functionality of the detectors is validated by implementing on ASIC and FPGA platforms (Spartan-6, Cyclone IV). Additionally, the proposed detection methods have demonstrated to successfully detect all of the injected faults without any false alarm. / Master of Science / Embedded systems nowadays play a very crucial role in day to day life. They are always gathering sensitive and private data of the users. So they become an attractive target for the attackers to steal this important data. As a result, the security of these devices has become a grave concern.
Fault attacks are a class of hardware attacks where the attacker injects faults into the system while it is executing a known program and observes the reaction. The abnormal reactions of the system are later analyzed to obtain the valuable data. Several mechanisms to detect such attacks exist in the literature, but they are not very effective. In this work, we first analyze the effect of different types of fault attacks on the embedded processor. Then we propose various low-cost digital techniques that can efficiently detect these attacks.
| Identifer | oai:union.ndltd.org:VTETD/oai:vtechworks.lib.vt.edu:10919/82141 |
| Date | 15 February 2018 |
| Creators | Deshpande, Chinmay Ravindra |
| Contributors | Electrical and Computer Engineering, Nazhandali, Leyla, Schaumont, Patrick R., Zeng, Haibo |
| Publisher | Virginia Tech |
| Source Sets | Virginia Tech Theses and Dissertation |
| Detected Language | English |
| Type | Thesis |
| Format | ETD, application/pdf |
| Rights | In Copyright, http://rightsstatements.org/vocab/InC/1.0/ |
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