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Using FPGA Co-processors for Improving the execution Speed of Pattern Recognition Algorithms in ATLAS LVL2 Trigger

Mannheim, Univ., Diss., 2006.

Identiferoai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/315880324
Date January 2006
CreatorsKhomich, Andrei.
Publisher[S.l. : s.n.],
Source SetsOCLC
LanguageEnglish
Detected LanguageEnglish
TypeOnline-Publikation.
SourceKostenfrei

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