The main subject of this thesis is to design a voltage peak detector for FPW-based IgE measurement systems. Therefore, two different peak detectors are proposed.
The first voltage peak detector basically samples the input signal twice (double sampling) to reduce the ripples appearing during the sample and hold modes. This voltage peak detector also resolves the detection error of conventional voltage peak detectors when they are used to detect the output signal of FPW-based biosensors.The fastest signal which this voltage peak detector can detect is 10 MHz.
The second voltage peak detector is composed of a coupling capacitor, an unity gain buffer, an 8th order voltage control voltage source(VCVS) low pass filter, and a non-inverting amplifier. The major difference of this design from the previous one is to filter and amplify the input signal. The specification requirements of the operational transconductance amplifier in this voltage peak detector can be relaxed thereafter. The resolution and performance of the sensing system are also improved. By replacing the conventional power MOS by a non-inverting amplifier, the charging time is reduced and over charge hazard is avoided. Besides, the speed of the entire system is enhanced. The fastest signal which this voltage peak detector can detect is 50 MHz and the precision is 0.357 %.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0711112-071939 |
| Date | 11 July 2012 |
| Creators | Tsai, Yueh-da |
| Contributors | Chua-Chin Wang, Tzu-Chao Chuang, I-Yu Huang, Yu-Cheng Lin |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0711112-071939 |
| Rights | user_define, Copyright information available at source archive |
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