In the microprocessor development, the high performance microprocessor applies the x86 complex instruction set is used widely.
And the signal-core architecture towards slowly to multi-core one .But the variable-length instruction still creates the difficulties in instruction fetching and affects the whole executive- performance. There has the mechanism which supported the split-line and fetched fleetly the variable-lengths instruction. It has the problem in high time and hardware complexity, because it was accomplished with additional hardware. Accordingly, this paper proposed a fixed-length instruction set with design in compatible and extended x86 instruction set used the fixed-length instruction form to solve the difficulties in fetching the variable-length instructions. We considered the factor an overall arrangement of memory space and decided the length 4 bytes and 8 bytes to formulate the fixed-length instruction set. And we used the following six transitionary rules to complete the formulation for the coded form of the fixed-length instructions.(1)We used the auxiliary registers to save the value to decrease the data dependence between the original registers.(2)If it could use a few instructions to complete the translation with the original registers, we used the original registers to do it.(3)The complex case instructions were coded with eight bytes.(4)It did sign-extension by itself when displacement and immediate were moved to the auxiliary registers.(5)The auxiliary registers with the diacritic prefix were only coded in the r/m field or the index field.(6)One of displacement field and immediate field was moved first when its length was longer.
And we considered the hardware complexity of saving memory space and fetching instructions, we analyzed the categories of instruction packages to compress the program space to decrease the space loss which the fixed-lengths of instructions created. In the case of verifiable and experimental framework, the CINT2006 was used to be benchmarks. And the function which translated the fixed-length instructions was succeeded to execute. It was successful to achieve the purpose the program space was compressed efficiently in the instruction package mechanism.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0804108-163247 |
| Date | 04 August 2008 |
| Creators | Lin, Jyun-Ji |
| Contributors | Tsung Lee, Jih-Ching Chiu, Da-Wei Chang |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0804108-163247 |
| Rights | not_available, Copyright information available at source archive |
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