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A unified validation framework for VLSI circuits using formal and abstraction techniques /

Thesis (Ph. D.)--University of Texas at Austin, 1998. / Vita. Includes bibliographical references (leaves 128-135). Available also in a digital version from Dissertation Abstracts.

Identiferoai:union.ndltd.org:OCLC/oai:xtcat.oclc.org:OCLCNo/43433690
Date January 1998
CreatorsMoundanos, Konstantinos,
Source SetsOCLC
LanguageEnglish
Detected LanguageEnglish
SourceDigital version accessible at:

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