In this thesis, a high-efficient integrated pixel compensator architecture for the H.264/AVC standard has been proposed which can provide both inter and intra prediction functions for luma and chroma components of pixels. By decomposing the algorithms used for both prediction methods into small micro-operation steps, the fundamental arithmetic processing unit architecture capable for performing these operations can be first determined. Next, by considering the possible reference sample transfer issue, the overall compensator architecture will be built by using parallel processing units with some input and intermediate buffers which can be dynamically configured to perform proper computation schedules of different modes suitable for the nature input order of reference samples. The proposed design not only can avoid the additional data transposition buffer, but most importantly the data transfer time spent to fetch the reference samples can be overlapped with the data computation time. Since both arithmetic units and the intermediate data buffer for both inter and intra prediction processes have been shared, our integrated design can achieve more than 30% reduction of gate count compared with the sum of the separate designs. Our design can also lead to more than 38% saving of gate count compared with the previous designs.
In addition to the data-path design, this thesis also addresses the memory bandwidth optimization issue which is especially important for the luma interpolation process. A new data-reuse buffer design based on a two-dimensional cache architecture to explore the possible data reuse among the inter and intra partitions will be proposed. The proposed design can be easily integrated with the H.264 interpolator to reduce the enormous demand of memory access. Our experimental results shows that our saving of memory bandwidth can be 20% more than what the best design can achieve by exploring the intra-partition data reuse only. Besides, our compensator can decode the videos up to HDTV resolution, and be applied for the dedicated H.264 hardware codec for various consumer devices.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0807108-200335 |
| Date | 07 August 2008 |
| Creators | Tong, Ting-Chi |
| Contributors | Chuen-Yau Chen, Yun-Nan Chang, Shen-Fu Hsiao |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0807108-200335 |
| Rights | withheld, Copyright information available at source archive |
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