In this thesis, we propose a high density non-classical unipolar CMOS width two embedded oxide (2EO) NMOS load. The words ¡§unipolar CMOS¡¨ refer to the fact that the conventional NMOS driver and the proposed 2EO NMOS load are presented in which the electron is the only carrier used. Among them, the 2EO scheme is used to isolate the inversion current. And the dominant current in the 2EO NMOS load is the punch through current which is not a destructive current mechanism. Our proposed CMOS, due to the same carrier used, does not have to compensate the layout width in load design. In addition, the shared terminal of output contacts and the elimination of N-well technique are also presented in our proposed CMOS. Therefore, the layout area can be reduced 72%, in comparison with conventional CMOS. Furthermore, the packing density can be increased and the fabrication cost can be reduced, respectively. We also find out that the delay time can be improved 39% to increase the operating frequency, as compared with the convention CMOS.
| Identifer | oai:union.ndltd.org:NSYSU/oai:NSYSU:etd-0725112-103653 |
| Date | 25 July 2012 |
| Creators | Lin, Chia-Hsien |
| Contributors | Feng-Der Albert Chin, Cheewee Liu, Pei-Wen Li, James B. Kuo, Jyi-Tsong Lin |
| Publisher | NSYSU |
| Source Sets | NSYSU Electronic Thesis and Dissertation Archive |
| Language | Cholon |
| Detected Language | English |
| Type | text |
| Format | application/pdf |
| Source | http://etd.lib.nsysu.edu.tw/ETD-db/ETD-search/view_etd?URN=etd-0725112-103653 |
| Rights | user_define, Copyright information available at source archive |
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